A display apparatus such as an active matrix type liquid crystal display apparatus or an organic EL display apparatus includes a thin film transistor (TFT) substrate on which TFTs are formed, and a plurality of source signal lines and a plurality of gate signal lines are arranged in a matrix on the TFT substrate. A drain electrode of each TFT is connected with a pixel electrode, a source electrode is connected with the source signal line, and a gate electrode is connected with the gate signal line. By supplying a gate signal to the gate signal line, the TFT is controlled to be turned on or off. By supplying a source signal to the source electrode of each turned on TFT, a potential of the pixel electrode is controlled to display an image.
In a manufacturing process of such a display apparatus, defects such as disconnection or short circuit may occur in the source signal line or the gate signal line due to contamination with dust at the time of film formation of the TFT substrate or etching using a resist mask in which pinholes are generated. If a defect occurs in the source signal line or the gate signal line, a signal is not correctly transmitted beyond the defective place, such that a display defect occurs on a display screen.
Japanese Patent No. 4255683 and Japanese Patent No. 4567058 disclose a display apparatus in which a disconnected signal line and a spare wiring intersecting the signal line are connected with each other, thereby a signal may be transmitted beyond the disconnected place by bypassing the signal.
Specifically, in the display apparatuses of Japanese Patent No. 4255683 and Japanese Patent No. 4567058, it is possible to correct the above-described display defect by short-circuiting the disconnected signal line and the spare wiring at two places before and after the disconnected place.